(a) Field of the Invention
The present invention relates to a method for manufacturing a semiconductor memory device and, more particularly to a method for manufacturing a semiconductor memory device in which ion-implantation is separately performed in a memory cell portion and in a peripheral portion.
(b) Description of the Related Art
In general, a nonvolatile memory device such as an EPROM or a flash memory comprises a memory cell portion and a peripheral portion located adjacent thereto on a common chip. The memory cell portion is formed by an array of memory cells each implemented by an n-channel MOS transistor having a two-layer gate electrode structure, while the peripheral portion is formed by CMOS transistors having a single-layer gate electrode structure implementing multiplexers, a sense circuit, etc.
In forming such a nonvolatile memory device, conventional methods comprise a step of forming gate electrodes of n-channel transistors for both the memory cell portion and the peripheral portion in the same step, and a subsequent step of implanting As ions on the entire surface of the substrate to form diffused layers for the sources and drains of n-channel MOS transistors of both the memory cell portion and the peripheral portion, while covering the region for p-channel transistors of the peripheral portion with a photoresist layer.